Khanh N. Dang
Assistant Professor,
VNU University of Engineering and Technology,
Vietnam National University, Hanoi (VNU)
Room 2.1, E4, Vietnam National University, Hanoi,
144 Xuan Thuy Rd., Hanoi, Vietnam [map]
Email: khanh.n.dang@vnu.edu.vn
Tel.: +84-24-3754 9664 (office)
ORCID | GScholar | Publons | Linkedin | Github

Current Research


  • 2021-06: We have released the source code for fault insertion into Spiking CNN (VGG-16) on CIFAR-10 dataset. Access the source code here. The source code is related to the paper titled “Enabling Deep Spiking Neural Networks with Hybrid Conversion and Spike Timing Dependent Backpropagation” published in ICLR, 2020 with our fault insertion on weights and thresholds.
  • 2021-06: Our paper titled “Towards Robust Cognitive 3D Brain-inspired Cross-paradigm System” has been accepted for publication in the Frontiers in Neuroscience. The paper presents R-NASH - our latest neuromorphic system in 3D-ICs. You can access the paper here or download PDF file.
  • 2021-05: Our paper titled “Energy-efficient Spike-based Scalable Architecture for Next Generation Cognitive AI Computing Systems” first authored by Mark has been awarded the Best Student Paper Award at The 6th international symposium on Ubiquitous Networking (UNet’21). More details here.
  • 2021-04: Our paper titled “On the Design of a Fault-tolerant Scalable Three Dimensional NoC-based Digital Neuromorphic System with On-chip Learning” has been accepted for publication in the IEEE Access. Access the paper here.
  • 2021-03: Our paper titled “HotCluster: A thermal-aware defect recovery method for Through-Silicon-Vias Towards Reliable 3-D ICs systems” is accepted for publication in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Access the paper here.
  • 2020-11: I have started working for University of Aizu as a visiting researcher.
  • 2020-11: Our new patent application named “An AI processor” has been filed.
  • 2020-11: Our paper titled “A lightweight Max-Pooling method and architecture for Deep Spiking Convolutional Neural Networks” has been accepted for APCCAS 2020.
  • 2020-09: Our paper tilted “A thermal-aware on-line fault tolerance method for TSV lifetime reliability in 3D-NoC systems” has been accepted for IEEE Access. Access the paper here.
  • 2020-08: Our paper tilted “Scalable design methodology and online algorithm for TSV-cluster defects recovery in highly reliable 3D-NoC systems” has been published for IEEE Transactions on Emerging Topics in Computing (TETC). Access the paper here.
  • 2020-07: Due to the Covid-19 epidemic, MCSoC 2020 is postponed to 2021 in the same venue.
  • 2020-04: Our paper titled “TSV-OCT: A scalable online multiple TSV defects localization for 3D-ICs” is published for IEEE Trans. on VLSI systems! Access the paper here.
  • 2020-03: Our journal paper titled “A non-blocking non-degrading multi-defect link test method for 3D-Networks-on-Chip” has been accepted for IEEE Access. Access the paper here.
  • 2019-12: I will be a visiting researcher at The University of Aizu in 2020 to continue the work on designing Spiking Neural Network on hardware.
  • 2019-04: We visit Prof. Pham’s Laboratory at UC Davis as a part of our WorldBank funded project.
  • 2018-12: Our project has been funded by NAFOSTED under No. 102.01-2018.312 (2019 - 2021).
  • 2018-09: Our project has been funded by VNU-UET under No. CN 19.10 (2018 - 2019).